145 models ranked for embedded and IoT development. Scored with bonuses for reasoning (hardware debugging), large context (datasheets), JSON mode, function calling, streaming, and open-source availability (edge deployment).
| # | Model | Score |
|---|---|---|
| 1 | DeepSeek V4 ProDeepSeek | 86 |
| 2 | DeepSeek V3.2DeepSeek | 81 |
| 3 | Gemma 4 31B (free)Google | 80 |
| 4 | Gemma 4 31BGoogle | 80 |
| 5 | Qwen3.5 397B A17BAlibaba | 79 |
| 6 | R1 0528DeepSeek | 79 |
| 7 | GLM 5.2Zhipu AI | 78 |
| 8 | MiniMax M2.5MiniMax | 78 |
| 9 | GLM 5Zhipu AI | 78 |
| 10 | Qwen3.5-122B-A10BAlibaba | 77 |
| 11 | DeepSeek V4 FlashDeepSeek | 77 |
| 12 | Qwen3.5-27BAlibaba | 77 |
| 13 | GLM 5.1Zhipu AI | 76 |
| 14 | MiMo-V2.5-ProXiaomi | 76 |
| 15 | Qwen3.5-35B-A3BAlibaba | 76 |
| 16 | Kimi K2.6Moonshot AI | 75 |
| 17 | GLM 4.5Zhipu AI | 75 |
| 18 | MiniMax M3MiniMax | 74 |
| 19 | R1DeepSeek | 74 |
| 20 | Gemma 4 26B A4B (free)Google | 73 |
| 21 | Gemma 4 26B A4B Google | 73 |
| 22 | MiMo-V2.5Xiaomi | 72 |
| 23 | GLM 4.7Zhipu AI | 72 |
| 24 | MiniMax M2MiniMax | 72 |
| 25 | GLM 4.6Zhipu AI | 70 |
| 26 | DeepSeek V3.2 ExpDeepSeek | 70 |
| 27 | MiniMax M2.1MiniMax | 70 |
| 28 | MiniMax M2.7MiniMax | 69 |
| 29 | DeepSeek V3.1DeepSeek | 69 |
| 30 | DeepSeek V3.1 TerminusDeepSeek | 69 |
Write and optimize embedded C/C++ code, generate microcontroller initialization, and create hardware abstraction layers. Models understand memory-constrained environments.
Reasoning models analyze serial logs, interpret hardware errors, and debug GPIO/I2C/SPI communication. Large context handles full datasheets and debug traces.
Generate task schedulers, semaphore management, and interrupt handlers. Models help with race condition detection and real-time constraint analysis.
Build MQTT/HTTP clients, format sensor data payloads, and generate cloud integration code. Open-source models can run on edge devices for local inference.
Yes, models generate bare-metal C, RTOS task code, driver implementations, and hardware abstraction layers. Reasoning handles memory-constrained optimization, interrupt handling, and timing-critical logic. Models understand ARM, RISC-V, and AVR architectures.
Top models understand memory limitations, power consumption trade-offs, and real-time requirements. They suggest stack-only allocations, DMA optimization, and ISR design patterns. Large context helps when working with complex datasheets and reference manuals.
Models interpret datasheets, generate register maps, write SPI/I2C/UART communication code, and create pin configuration headers. Vision-capable models can read schematic diagrams and identify connection issues between hardware components.
Models with strong reasoning and code generation handle FreeRTOS, Zephyr, and ThreadX patterns including task synchronization, message queues, and semaphores. They generate BSP configurations and linker scripts for specific microcontroller families.